The present invention relates to a semiconductor device having a circuit which is desired to perform as intended without being affected by any unevenness in device characteristics among lots/wafers/chips, temperature fluctuation or the like, for instance a microcomputer or a flash memory, and to a method of adjusting the characteristics of the semiconductor device, for instance a technique which can be effectively applied to a microcomputer with a built-in flash memory.
Semiconductor devices may run into performance deterioration as circuit characteristics deviate from the desired performance characteristics intended in the circuit design as a consequence of some unevenness in the manufacturing process. Remedies for such performance deterioration include, for instance a technique to make a constant amperage adjustable in a semiconductor device with a built-in constant amperage source, and the Japanese Published Unexamined Patent Application No. Hei 11(1999)-7783 describes an EEPROM for adjusting the programming time by setting a desired constant amperage according to trimming data. The Japanese Published Unexamined Patent Application No. Hei 11(1999)-145393 discloses a method by which the amperage ratio of a current mirror circuit is measured and a transistor is selected according to a mask pattern. Further, according to the Japanese Published Unexamined Patent Application No. Hei 10(1998)-214496, a trimming circuit for allowing fine adjustment of the output voltage of a voltage clamping means against process fluctuations of a semiconductor device, such as a microcomputer, and this trimming circuit is controlled with a trimming control means according to trimming adjustment information. The technique disclosed in the patent application further provides for a register in which the trimming adjustment information is to be set, and the trimming adjustment information is transferred from a specific area in a non-volatile memory to this register to perform trimming as desired with software.
However, according to the Japanese Published Unexamined Patent Application No. Hei 11(1999)-7783, a desired transistor is selected out of a plurality of transistors differing in threshold voltage according to trimming data to adjust the programming time and the output of a timer circuit is adjusted to keep the programming time constant all the time, but there is no mention of how to select the desired transistor. Regarding the method disclosed in the Japanese Published Unexamined Patent Application No. Hei 11(1999)-145393, by which the amperage ratio of a current mirror circuit is measured and a transistor is selected according to a mask pattern, but trimming to bring the amperage ratio, which is a characteristic of a current mirror circuit, into a desired state is often rather difficult. Therefore, the present inventor has found that this would invite elongation of the time required to acquire trimming data, i.e. the testing time, and the accuracy of adjustment by trimming tends to be poor. Nor is there any mention in the Japanese Published Unexamined Patent Application No. Hei 10(1998)-214496 as to how trimming information is to be determined.
Examination by the present inventor has revealed that it would not be easy to accurately monitor the output time of the timer circuit according to, for instance, the Japanese Published Unexamined Patent Application No. Hei 11 (1999)-7783. Though there is no mention of this point in its specification, it may be possible to acquire trimming data according to which a desired transistor is to be selected out of a plurality of transistors differing in threshold voltage by externally measuring the output time of the timer circuit via an I/O port or the like, but there are not a few parasitic capacitors and resistors on the path of measurement from the timer circuit to the I/O port via an internal bus, and the obtuseness or distortion of signal waveforms they give rise to is likely to make accurate measurement difficult. The testing system will be made complex, moreover. It is desirable to perform trimming lot by lot, wafer by wafer or chip by chip, and there is the remaining problem of an extended testing time.
In particular, within a chip, often there are a plurality of circuits to be trimmed apart from a timer circuit. In such a case, the testing time will be further extended if the characteristics are measured circuit by circuit and trimming data are acquired individually, resulting in a corresponding increase in testing cost.
An object of the present invention is to provide a semiconductor device, such as a microcomputer or a flash memory, facilitating measurement for acquisition of control data (trimming data) for use in the adjustment of circuit characteristics.
Another object of the invention is to provide a semiconductor device, such as a microcomputer or a flash memory, serving to reduce the time taken to acquire trimming data.
Still another object of the invention is to provide a semiconductor device, such as a microcomputer or a flash memory, making possible highly reliable adjustment of the characteristics of circuits which are desired to have intended characteristics unaffected by unevenness of device characteristics or the like.
The above-stated and other objects and novel features of the present invention will become apparent from the description in this specification and the accompanying drawings.
What follows is a brief summary of typical aspects of the present invention disclosed in this application.
[1] A semiconductor device according to the invention has, formed over one semiconductor chip, a control voltage generating circuit (10) for generating a control voltage on the basis of control data; circuits (4, etc.) using a constant current source generating a constant current on the basis of the control voltage; a current measuring transistor (2) whose control terminal is connected to a signal line for providing the control voltage to the constant current source; an external measuring terminal (3), connected to the current terminal of the current measuring transistor, for making possible external measurement of the current flowing in the current measuring transistor; and a memory means (13) for holding control data and providing them to the control voltage generating circuit. The control data are utilized for determining the characteristics of the circuits using the constant current source, and the choice of control data determines the characteristics of the pertinent circuit. When the characteristics of a given circuit are to be determined, control data are actually provided to the control voltage generating circuit to generate a control voltage, and the resultant current actually flowing in the current measuring transistor is observed at the external measuring terminal. The measurement is done either by connecting a current measuring apparatus to the external measuring terminal and measuring the amperage therewith, or applying a voltage to the external measuring terminal via a resistor having a known resistance and measuring the voltage with a voltage measuring apparatus arranged in parallel to the resistor. The measuring line within the semiconductor device has no intervening internal bus or I/O circuit and few undesirable parasitic capacitance components or wiring resistance components which distort observed signal waveforms to a substantial extent. The value of control data required for obtaining the desired constant current is acquired from the value of the control data at the time when the observed value has become equal to the target value or from the correlation between the observed value and the control data at the time. The value thereby obtained is stored into the memory means as the control data. The semiconductor device determines the constant current of the constant current source on the basis of the control data stored in the memory means. Therefore, the measurement for determining the constant current can be accomplished accurately and, moreover, in a short period of time, and constant current characteristics can be aligned with high reliability, unaffected by process unevenness.
Where a semiconductor device has a plurality of circuits each provided with a constant current source, the circuit for determining the control voltage can be restrained in dimensions, and the processing time required for determining the control voltage further shortened, by providing the control voltage commonly to the constant current source of each of the plurality of circuits.
As a specific form of the semiconductor device according to the invention, the constant current source includes a constant current source MOS transistor for receiving the control voltage at its control terminal for controlling mutual conductance. More preferably, the current measuring transistor should be a MOS transistor manufactured by the same process as the constant current source MOS transistor. This would make particularly clear the correlation between the measuring current flowing in the current measuring transistor and the constant current actually flowing in the constant current source MOS transistor. Taking into consideration the accuracy of current measurement by a tester or the like connect to the external measuring terminal for current measurement, if the current flowing in a single current measuring MOS transistor is no more than a few xcexcA, the current measuring transistor may be configured of a plurality of MOS transistors of the same size as the constant current source MOS transistor and connected in parallel.
The current measuring MOS transistor is now taken up for consideration with a view to stabilizing the current source (current source MOS transistor). First, the n-channel type MOS transistor connected in a position distant from the power supply terminal is less susceptible to the influence of power supply fluctuations than a p-channel type MOS transistor. With this factor taking into account, the current measuring MOS transistor formed in the same process as the constant current source MOS transistor should desirably consist of an n-channel type MOS transistor. From the viewpoint of current fluctuations, the current measuring MOS transistor formed in the same process as the constant current source MOS transistor should desirably be operated in a saturation current region. From the viewpoint of threshold voltage, the current measuring MOS transistor formed in the same process as the constant current source MOS transistor should desirably have a channel length entailing little fluctuation of threshold voltage accompanying unevenness in channel length. It is further desirable for the current measuring MOS transistor to have a channel width entailing little fluctuation of threshold voltage accompanying unevenness in channel width. In short, for the current measuring MOS transistor, the channel length and width should desirably be greater than for the MOS transistor constituting a logic circuit.
As a specific form of the semiconductor device according to the invention, the constant current source may have a constant current source MOS transistor, which receives the control voltage at its control terminal to undergo control of mutual conductance, and a current mirror load, and use a constant current source circuit capable of supplying a constant voltage.
In this case, the circuit using the constant current source may be, for instance, a delay circuit (4) having a delay element, and the delay time of the delay element is controlled with a constant voltage supplied from the constant current source circuit. In another example the circuit using the constant current source may be a ring oscillator (5) having a plurality of delay elements, and the delay time of each delay element is controlled with a constant voltage supplied from the constant current source circuit. In another example, the circuit using the constant current source may be a timer (6) provided with a ring oscillator having a plurality of delay elements and a counter for counting periodic signals supplied from the ring oscillator and supplying pulse signals, and the delay time of each delay element is controlled with a constant voltage supplied from the constant current source circuit.
In another example, the circuit using the constant current source may have as a circuit for selective flowing of a constant current a first MOS transistor (M15A), a second MOS transistor (M15B), each receiving at its control terminal a constant voltage (voltage N5) supplied from the constant current source circuit, and a third MOS transistor (M16A) arranged between the first and second MOS transistors and subjected to switching control. This arrangement can restrain a situation in which the constant voltage is fluctuated by capacitance coupling via the gate capacitance of a MOS transistor because, where the third MOS transistor is cut off, the state of capacitance coupling to the constant voltage via the gate capacitance of the first MOS transistor connected to the higher potential side and the state of capacitance coupling to the constant voltage via the gate capacitance of the second MOS transistor connected to the lower potential side tend to vary in a complementary way when the third MOS transistor is turned to start flowing of a constant current, and therefore it is made possible to stabilize at a constant amperage the current flowing in the first through third MOS transistors. In another example, the circuit using the constant current source may have as a circuit for selective flowing of a constant current for the discharging purpose the first MOS transistor (M15A), the second MOS transistor (M15B), each receiving at its control terminal a constant voltage (voltage N5) supplied from the constant current source circuit, the third MOS transistor (M16A) arranged between the first and second MOS transistors and subjected to switching control, and a fourth MOS transistor (M16B) as a circuit for selective flowing of a constant current for the discharging purpose, subjected to switching control in a complementary way with the third MOS transistor and connected in series to the second MOS transistor. In another example, the circuit using the constant current source may have as a first circuit for selective flowing of a constant current for the discharging purpose a first MOS transistor (M4A), a second MOS transistor (M4B), each receiving at its control terminal a first constant voltage (voltage N1) from the constant current source circuit, a third MOS transistor (M10A) arranged between the first and second MOS transistors and subjected to switching control, and as a second circuit for selective flowing of a constant current for the discharging purpose a fourth MOS transistor (M7A) and a fifth MOS transistor (M7B), each receiving at its control terminal a second constant voltage (voltage N2) supplied from the constant current source circuit, a sixth MOS transistor (M10B) arranged between the fourth and fifth MOS transistors and subjected to switching control.
In another example, the circuit using the constant current source may be clamp circuit (7) having a differential amplifier having the constant current source MOS transistor as its constant current source and an output circuit receiving at its control terminal the differential output voltage of the differential amplifier, the clamp circuit being capable of control by feeding back the output voltage of the output circuit to a constant voltage via the differential amplifier.
In another mode of implementing the invention, a semiconductor device may have a built-in circuit module permitting electrical rewriting of stored information, such as a flash memory. In this case, the semiconductor device has a non-volatile memory element whose threshold voltage is programmable, a reference circuit (8) for generating a decision level for a voltage emerging on a data line correspondingly to the threshold voltage of the non-volatile memory element, and a sense amplifier (86) for comparing the decision level of the reference circuit and the voltage emerging on the data line correspondingly to the threshold voltage of the non-volatile memory element. The reference circuit is configured of a circuit having the constant current source MOS transistor on its discharge path. This can be considered a specific example of circuit using the constant current source.
The reference circuit has as a circuit for selective flowing of a constant current a first MOS transistor (M33), a second MOS transistor (M34), each receiving at its control terminal the control voltage (vtri), and a third MOS transistor (M35) arranged between the first and second MOS transistors and subjected to switching control. As described above, this arrangement can restrain a situation in which the constant voltage applied to the gates of the first and second MOS transistors is fluctuated by capacitance coupling via the gate capacitance of a MOS transistor, stabilize at a constant amperage the current flowing in the reference circuit, and thereby realize stabilization of the comparing operation by the sense amplifier.
Here is supposed, like the foregoing, the semiconductor device has a built-in circuit module permitting electrical rewriting of stored information, such as a flash memory. In this case, the semiconductor device has a non-volatile memory element whose threshold voltage can be electrically altered; a program control circuit for controlling the alteration of the threshold voltage for the non-volatile memory element, and a verify sense amplifier (9) for detecting whether or not the alteration of the threshold voltage by the program control circuit has been completed. The verify sense amplifier has a logic gate (89) connected to the data terminal of the non-volatile memory element and having a prescribed logic threshold voltage; a constant current source circuit having the constant current source MOS transistor (M37) and generating a constant voltage in the vicinity of the logic threshold voltage on the basis of a constant current flowing in the transistor; and a load MOS transistor (M39) which receives a constant voltage generated by the constant current source circuit to be subjected to mutual conductance control, supplies a current to the data terminal of the non-volatile memory element and, when the threshold voltage of the non-volatile memory element has reached a prescribed state, controls the input to the logic gate to a level in the vicinity of the logic threshold voltage.
As another mode of implementing the invention, here is supposed a case in which the external measuring terminal is concurrently used for another purpose. In this case, a first selecting means (M40) is provided between the external measuring terminal and the current measuring MOS transistor, and some other circuit is connected between the external measuring terminal and the first selecting means via a second selecting means (M41). Obviously, the external measuring terminal can as well be caused to function as a terminal exclusively intended for current measurement.
The other circuit mentioned above may be, for instance, a voltage output circuit (95) for supplying a voltage corresponding to voltage control data stored in a memory means. The voltage supplied by this voltage output circuit is made observable from the external measuring terminal via the second selecting means. In this case, it is preferable to determine control data for the current control after the voltage control data have been determined. If the voltage output circuit is, for instance, the control voltage generating circuit, there is no sense in making definite the control data for determining the constant current unless the voltage output characteristic is determined first.
[2] A microcomputer (70) pertaining to a second aspect of the present invention comprises a CPU (71) and other circuits formed over one semiconductor chip, wherein the other circuits include a control voltage generating circuit for generating a control voltage on the basis of control data; a circuit using a constant current source MOS transistor for generating a constant current on the basis of the control voltage; a current measuring MOS transistor whose control terminal is connected to a path for supplying the control voltage to the constant current source MOS transistor; an external measuring terminal, connected to the current terminal of the current measuring MOS transistor, for making the current flowing in the current measuring MOS transistor measurable from outside the semiconductor chip; and a memory means for holding control data and providing them to the control voltage generating circuit. In this microcomputer, too, as in the above-described semiconductor device, the measuring line within the microcomputer has no intervening internal bus or I/O circuit and few undesirable parasitic capacitance components or wiring resistance components which distort observed signal waveforms to a substantial extent, and therefore the measurement for determining the constant current can be accomplished accurately and, moreover, in a short period of time, so that constant current characteristics can be aligned with high reliability, unaffected by process unevenness.
In a specific form of a microcomputer pertaining to the present invention, the memory means may be a non-volatile memory permitting no electrical rewriting of stored information, such as an electric fuse circuit. In another mode, the memory means may be a non-volatile memory permitting electrical rewriting of stored information, such as a flash memory. In another form, the memory means may further comprise registering means (13B, 13V) to which control data are transferable from the non-volatile memory and control data are also transferable from outside, and the transferred control data are supplied to a control voltage generating circuit. The use of the registering means facilitates the operation to set control data when measurement is done using an external measuring terminal. A non-volatile memory permitting electrical rewriting at the time of measurement would save the trouble of rewriting control data every time.
In another form of the microcomputer according to the invention, the aforementioned other circuits may include a flash memory accessible by a CPU, wherein the flash memory has an array of non-volatile memory elements whose threshold voltages are electrically alterable; a program circuit for altering the threshold voltages of the non-volatile memory elements; and a read circuit for reading information stored in the non-volatile memory elements. The read circuit has a reference circuit for generating a decision level for a voltage emerging on a data line correspondingly to the threshold voltage of the non-volatile memory element and a sense amplifier for comparing the decision level of the reference circuit and the voltage emerging on the data line correspondingly to the threshold voltage of the non-volatile memory element. The reference circuit uses the constant current source MOS transistor on whose discharge path the constant current source MOS transistor intervenes.
In a more specific form, the reference circuit consists of a first constant current source MOS transistor, a second constant current source MOS transistor, each receiving at its control terminal the control voltage, and a third MOS transistor arranged between the first and second MOS transistors and subjected to switching control, wherein a constant current is made to flow in the on-state of the third MOS transistor.
In another specific form, the program circuit has a verify sense amplifier for detecting whether or not the alteration of the threshold voltage by the program control circuit has been completed, wherein the verify sense amplifier has a logic gate connected to the data terminal of the non-volatile memory element and having a prescribed logic threshold voltage; a constant current source circuit having the constant current source MOS transistor and generating a constant voltage in the vicinity of the logic threshold voltage on the basis of a constant current flowing in the transistor; and a load MOS transistor which receives a constant voltage generated by the constant current source circuit to be subjected to mutual conductance control, supplies a current to the data terminal of the non-volatile memory element and, when the threshold voltage of the non-volatile memory element has reached a prescribed state, controls the input to the logic gate to a level in the vicinity of the logic threshold voltage.
In another specific form, the program circuit may either have one non-volatile memory element hold one bit of stored information or have one non-volatile memory element hold two bits or more of stored information. Thus, the program circuit sets each non-volatile memory element to one of four or more threshold voltages designated by a plurality of bits of programming data, and the read circuit causes each nonvolatile memory element to supply the state of threshold voltage as a corresponding plurality of bits of stored information, resulting in the realization of a multi-value flash memory in which stored information in one non-volatile memory element is provided in a plurality of bits.
In another form of the microcomputer according to the invention, the aforementioned other circuits may include a RAM accessible by a CPU, wherein the RAM has an array of volatile memory elements, a write circuit for writing into the volatile memory elements, and a read circuit for reading stored information in the volatile memory elements; the read circuit has a reference circuit for generating a decision level for a voltage emerging on a data line according to the stored information in the volatile memory elements and a sense amplifier for comparing the decision level of the reference circuit and the voltage emerging on the data line according to the stored information in the volatile memory elements. The reference circuit uses the constant current source MOS transistor on whose discharge path the constant current source MOS transistor intervenes.
[3] A flash memory pertaining to a third aspect of the present invention has, formed over one semiconductor chip, an array of non-volatile memory elements whose threshold voltages are electrically alterable; a program circuit for altering the threshold voltages of the non-volatile memory elements; and a read circuit for reading information stored in the non-volatile memory elements. Either or both of the program circuit and the read circuit include a circuit using a constant current source MOS transistor for receiving a constant current and generating a control voltage, and further has a signal line for providing the control voltage to the constant current source MOS transistor; a current measuring MOS transistor whose control terminal is connected to the signal line; an external measuring terminal, connected to the current terminal of the current measuring MOS transistor, for making the current flowing in the current measuring MOS transistor measurable from outside; a control voltage generating circuit for generating the control voltage on the basis of the control data; and a memory means for holding the control data and providing them to the control voltage generating circuit.
In a specific form of the flash memory, the read circuit has a reference circuit for generating a decision level for a voltage emerging on a data line according to the threshold voltages of the non-volatile memory elements and a sense amplifier for comparing the decision level of the reference circuit and the voltage emerging on the data line according to the threshold voltages of the non-volatile memory elements. The reference circuit uses the constant current source MOS transistor on whose discharge path the constant current source MOS transistor intervenes.
The reference circuit may consist of, for instance, a first constant current source MOS transistor, a second constant current source MOS transistor, each receiving at its control terminal the control voltage, and a third MOS transistor arranged between the first and second MOS transistors and subjected to switching control, wherein a constant current is made to flow in the on-state of the third MOS transistor.
The program circuit may have, for instance, a verify sense amplifier for detecting whether or not the alteration of the threshold voltages has been completed, wherein the verify sense amplifier has a logic gate connected to the data terminals of the non-volatile memory elements and having a prescribed logic threshold voltage; a constant current source circuit having the constant current source MOS transistor and generating a constant voltage in the vicinity of the logic threshold voltage on the basis of a constant current flowing in the transistor; and a load MOS transistor which receives a constant voltage generated by the constant current source circuit to be subjected to mutual conductance control, supplies a current to the data terminal of the non-volatile memory element and, when the threshold voltages of the non-volatile memory elements have reached a prescribed state, controls the input to the logic gate to a level in the vicinity of the logic threshold voltage.
In another specific form, the program circuit may either have one non-volatile memory element hold one bit of stored information or have one non-volatile memory element hold two bits or more of stored information. Thus, the program circuit sets each non-volatile memory element to one of four or more threshold voltages designated by a plurality of bits of programming data, and the read circuit causes each non-volatile memory element to supply the state of threshold voltage as a corresponding plurality of bits of stored information, resulting in the realization of a multi-value flash memory in which Stored information in one non-volatile memory element is provided in a plurality of bits.